As shown in FIG. 3, a conventional camera distance measuring device comprises an automatic focusing IC 22 (hereinafter referred to as "AFIC"), a position sensitive device 21 (hereinafter referred to as "PSD"), a light-emitting diode driver circuit 11 for driving a right infrared-emitting diode IR.sub.R, a center infrared-emitting diode IR.sub.C and a left infrared-emitting diode IR.sub.L (infrared-emitting diodes will hereinafter be referred to as "IRED"), and a microprocessor 12 (hereinafter referred to as "CPU") for controlling the light-emitting diode driver circuit 11. Light that is projected onto a subject SUB from the IRED through a projection lens (not shown) is reflected from the subject (not illustrated) and enters the PSD 21 through a light-receiving lens (not illustrated). When the reflected light is incident on the PSD 21, a right distance signal f.sub.R, a center distance signal f.sub.C and a left distance signal f.sub.L are delivered from a distance signal output terminal T.sub.13 of the AFIC 22 to the CPU 12.
The AFIC 22 comprises preamplifiers OP.sub.1 and OP.sub.3, OP.sub.2 and OP.sub.5, and OP.sub.4 and OP.sub.6 corresponding to right PSD terminals T.sub.1 and T.sub.3, center PSD terminals T.sub.2 and T.sub.5 and left PSD terminals T.sub.4 and T.sub.6, respectively, to which electrodes of the PSD 21 are connected, synchronizing switches 3 and 4 for differential current, synchronizing switches 5 and 6 for holding background light, and switches 7 and 8 for holding background light. These switches are solid-state devices. The AFIC 22 further comprises operational amplifiers OP.sub.7 and OP.sub.8 for eliminating non-signal light, transistors Q.sub.3 and Q.sub.4 for bypassing background light, and a differential amplifier 10 for distance signals. The output terminals of the preamplifiers OP.sub.1, OP.sub.2 and OP.sub.4 are connected to input terminals P.sub.1, P.sub.2 and P.sub.3, respectively, of the differential current synchronizing switch 3. An output terminal P.sub.4 of the synchronizing switch 3 is connected to the base of a transistor Q.sub.1 in the distance signal differential amplifier 10, and also to the cathode of a logarithmic compression diode D.sub.1 whose anode is connected to a power supply +V.sub.E. The output terminals of the preamplifiers OP.sub.3, OP.sub.5 and OP.sub.6 are connected to input terminals P.sub.1, P.sub.2 and P.sub.3, respectively, of the differential current synchronizing switch 4. An output terminal P.sub.4 of the synchronizing switch 4 is connected to the base of a transistor Q.sub.2 in the distance signal differential amplifier 10, and also to the cathode of a logarithmic compression diode D.sub.2 whose anode is connected to the power supply +V.sub.E. Similarly, the input sides of the preamplifiers OP.sub.1, OP.sub.2 and OP.sub.4 are connected to input terminals P.sub.1, P.sub.2 and P.sub.3, respectively, of the background light hold synchronizing switch 5, and an output terminal P.sub.4 of the synchronizing switch 5 is connected to the collector of the background light by-pass transistor Q.sub.3. The emitter of the transistor Q.sub.3 is connected to a reference potential node, while the base thereof is connected to one end of a background light hold capacitor C.sub.1, the other end of which is connected to the reference potential node. The input terminals of the preamplifiers OP.sub.3, OP.sub.5 and OP.sub.6 are connected to input terminals P.sub.1, P.sub.2 and P.sub.3, respectively, of the background light hold synchronizing switch 6, and an output terminal P.sub.4 of the synchronizing switch 6 is connected to the collector of the background light by-pass transistor Q.sub.4. The base of the transistor Q.sub.4 is connected to one end of a background light hold capacitor C2, the other end of which is connected to the reference potential node. Further, the bases of the background light by-pass transistors Q.sub.3 and Q.sub.4 are connected to respective output terminals P.sub.2 of the background light hold switches 7 and 8. Input terminals P.sub.1 of the switches 7 and 8 are connected to the respective output terminals of the non-signal light eliminating operational amplifiers OP.sub.7 and OP.sub.8. A reference voltage V.sub.REF is applied to the (-) terminals of the operational amplifiers OP.sub.7 and OP.sub.8. The (+) terminals of the operational amplifiers OP.sub.7 and OP.sub.8 are connected to the respective bases of the transistors Q.sub.1 and Q.sub.2 in the distance signal differential amplifier 10.
The control circuit of the differential current synchronizing switches 3 and 4 and the background light hold synchronizing switches 5 and 6 are connected to the control output circuit of the CPU 12 through differential current synchronizing switch control terminals T.sub.7 to T.sub.10, respectively, while the control circuit of the background light hold switches 7 and 8 are connected to the control output circuit of the CPU 12 through background light hold switch control terminals T.sub.11 and T.sub.12, respectively.
It should be noted that the background light hold capacitors C.sub.1 and C.sub.2 are parts which are mounted externally of the AFIC 22.
In general, it is desirable for the PSD 21 to receive only signal light having the same wavelength as that of light emitted from the IRED. Therefore, the PSD 21 is provided with an optical filter formed from, for example, a resin material, so as to by-pass light of wavelength other than that of light emitted from the IRED, thereby eliminating the external light. However, the external light includes light having the same wavelength as that of light from the IRED. Accordingly, not only distance currents I.sub.1 and I.sub.2 derived from the light emitted from the IRED but also noise currents derived from the external light are output to the bases of the transistors Q.sub.1 and Q.sub.2 in the distance signal differential amplifier 10. Therefore, the light-emitting timing of the IRED is controlled by the CPU 12 so as to eliminate the noise currents due to the external light.
More specifically, when the background light hold switches 7 and 8 are controlled to be kept closed by the CPU 12 through the background light hold switch control terminals T.sub.11 and T.sub.12, the base current flows in the bases of the background light by-pass transistors Q.sub.3 and Q.sub.4 constantly. Accordingly, noise currents due to the external light, exclusive of the distance currents I.sub.1 and I.sub.2, are suppressed by the logarithmic compression diodes D.sub.1 and D.sub.2 at a level determined by the reference voltage V.sub.REF. When the background light hold switches 7 and 8 are opened, the base voltages of the background light by-pass transistors Q.sub.3 and Q.sub.4 are fixed to the potentials of the background light hold capacitors C.sub.1 and C.sub.2. Accordingly, only the distance currents I.sub.1 and I.sub.2 are applied to the respective bases of the transistors Q.sub.1 and Q.sub.2 in the distance signal differential amplifier 10.
The camera distance measuring device arranged as described above, employs wiring to extend from the electrodes of the PSD 21 to the right PSD terminals T.sub.1 and T.sub.3, the center PSD terminals T.sub.2 and T.sub.5 and the left PSD terminals T.sub.9 and T.sub.12, OP.sub.5 and OP.sub.6 of the AFIC 22 and further uses the preamplifiers OP.sub.1 to OP.sub.6 to correspond to the right PSD terminals T.sub.1 and T.sub.3, the center PSD terminals T.sub.2 and T.sub.5 and the left PSD terminals T.sub.4 and T.sub.6. Therefore, the conventional distance measuring device suffers from the disadvantage that the chip size of the integrated circuit is large. In addition, as the number of conductors increases, it becomes more likely that signal light will be affected by noise.